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» Parallel Processing Architectures for Reconfigurable Systems
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MICRO
1998
IEEE
108views Hardware» more  MICRO 1998»
14 years 1 months ago
Exploiting Instruction Level Parallelism in Geometry Processing for Three Dimensional Graphics Applications
Three dimensional (3D) graphics applications have become very important workloads running on today's computer systems. A cost-effective graphics solution is to perform geomet...
Chia-Lin Yang, Barton Sano, Alvin R. Lebeck
DAC
1999
ACM
14 years 1 months ago
Application of High Level Interface-Based Design to Telecommunications System Hardware
The assumption in moving system modelling to higher levels is that this improves the design process by allowing exploration of the architecture, providing an unambiguous specifica...
Dyson Wilkes, M. M. Kamal Hashmi
ARC
2008
Springer
141views Hardware» more  ARC 2008»
13 years 11 months ago
A Parallel Hardware Architecture for Image Feature Detection
Abstract. This paper presents a real time parallel hardware architecture for image feature detection based on the SIFT (Scale Invariant Feature Transform) algorithm. This architect...
Vanderlei Bonato, Eduardo Marques, George A. Const...
NPC
2010
Springer
13 years 7 months ago
Distributed Stream Processing with DUP
This paper introduces the DUP System, a simple framework for parallel stream processing. The DUP System enables developers to compose applications from stages written in almost any...
Kai Christian Bader, Tilo Eißler, Nathan S. ...
DAC
2007
ACM
14 years 10 months ago
A Self-Tuning Configurable Cache
The memory hierarchy of a system can consume up to 50% of microprocessor system power. Previous work has shown that tuning a configurable cache to a particular application can red...
Ann Gordon-Ross, Frank Vahid