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FPL
2010
Springer
210views Hardware» more  FPL 2010»
13 years 7 months ago
A Compact Transactional Memory Multiprocessor System on FPGA
In this paper we present a rapid prototyping platform on a single Field Programmable Gate Array (FPGA) with support for software transactional memory. The system is composed only b...
Matteo Pusceddu, Simone Ceccolini, Gianluca Palerm...
PLDI
2012
ACM
12 years 5 days ago
JANUS: exploiting parallelism via hindsight
This paper addresses the problem of reducing unnecessary conflicts in optimistic synchronization. Optimistic synchronization must ensure that any two concurrently executing trans...
Omer Tripp, Roman Manevich, John Field, Mooly Sagi...
EUROSYS
2009
ACM
14 years 6 months ago
xCalls: safe I/O in memory transactions
Memory transactions, similar to database transactions, allow a programmer to focus on the logic of their program and let the system ensure that transactions are atomic and isolate...
Haris Volos, Andres Jaan Tack, Neelam Goyal, Micha...
IEEEPACT
2005
IEEE
14 years 3 months ago
Characterization of TCC on Chip-Multiprocessors
Transactional Coherence and Consistency (TCC) is a novel coherence scheme for shared memory multiprocessors that uses programmer-defined transactions as the fundamental unit of p...
Austen McDonald, JaeWoong Chung, Hassan Chafi, Chi...
POPL
2009
ACM
14 years 10 months ago
Feedback-directed barrier optimization in a strongly isolated STM
Speed improvements in today's processors have largely been delivered in the form of multiple cores, increasing the importance of ions that ease parallel programming. Software...
Nathan Grasso Bronson, Christos Kozyrakis, Kunle O...