1075 search results - page 189 / 215 » Parallel Programming with Transactional Memory |
CASES
2004
ACM
14 years 1 months ago
2004
ACM
+ With more applications being deployed on embedded platforms, software protection becomes increasingly important. This problem is crucial on embedded systems like financial transa...
CF
2009
ACM
14 years 3 months ago
2009
ACM
Recently, multi-core architectures with alternative memory subsystem designs have emerged. Instead of using hardwaremanaged cache hierarchies, they employ software-managed embedde...
ASPLOS
2010
ACM
14 years 3 months ago
2010
ACM
SIMD (Single Instruction, Multiple Data) engines are an essential part of the processors in various computing markets, from servers to the embedded domain. Although SIMD-enabled a...
IEEEPACT
2007
IEEE
14 years 2 months ago
2007
IEEE
There has recently been much interest in stream processing, both in industry (e.g., Cell, NVIDIA G80, ATI R580) and academia (e.g., Stanford Merrimac, MIT RAW), with stream progra...
DSL
1997
13 years 9 months ago
1997
In this paper we describe our experience with Teapot [7], a domain-specific language for writing cache coherence protocols. Cache coherence is of concern when parallel and distrib...