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» Parallel Programming with Transactional Memory
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PPOPP
2010
ACM
14 years 4 months ago
Leveraging parallel nesting in transactional memory
Exploiting the emerging reality of affordable multi-core architeces through providing programmers with simple abstractions that would enable them to easily turn their sequential p...
João Barreto, Aleksandar Dragojevic, Paulo ...
EUROPAR
2007
Springer
14 years 1 months ago
Hardware Transactional Memory with Operating System Support, HTMOS
Abstract. Hardware Transactional Memory (HTM) gives software developers the opportunity to write parallel programs more easily compared to any previous programming method, and yiel...
Sasa Tomic, Adrián Cristal, Osman S. Unsal,...
ISCA
2008
IEEE
143views Hardware» more  ISCA 2008»
13 years 7 months ago
TokenTM: Efficient Execution of Large Transactions with Hardware Transactional Memory
Current hardware transactional memory systems seek to simplify parallel programming, but assume that large transactions are rare, so it is acceptable to penalize their performance...
Jayaram Bobba, Neelam Goyal, Mark D. Hill, Michael...
PLDI
2009
ACM
14 years 2 months ago
Parallelizing sequential applications on commodity hardware using a low-cost software transactional memory
Multicore designs have emerged as the mainstream design paradigm for the microprocessor industry. Unfortunately, providing multiple cores does not directly translate into performa...
Mojtaba Mehrara, Jeff Hao, Po-Chun Hsu, Scott A. M...