287 search results - page 10 / 58 » Parallel Skyline Computation on Multicore Architectures |
ICPP
2009
IEEE
14 years 2 months ago
2009
IEEE
The multicore revolution is underway, bringing new chips introducing more complex memory architectures. Classical algorithms must be revisited in order to take the hierarchical me...
IPPS
2009
IEEE
14 years 2 months ago
2009
IEEE
In this paper, we empirically evaluate fundamental design trade-offs among the most recent multicore processors and accelerator technologies. Our primary aim is to aid application...
MICRO
2010
IEEE
13 years 5 months ago
2010
IEEE
This paper presents ReMAP, a reconfigurable architecture geared towards accelerating and parallelizing applications within a heterogeneous CMP. In ReMAP, threads share a common rec...
IEEEPACT
2007
IEEE
14 years 2 months ago
2007
IEEE
Multi-core processors naturally exploit thread-level parallelism (TLP). However, extracting instruction-level parallelism (ILP) from individual applications or threads is still a ...
HPCA
2012
IEEE
12 years 3 months ago
2012
IEEE
Multiprocessor architectures that continuously execute atomic blocks (or chunks) of instructions can improve performance and software productivity. However, all of the prior propo...