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» Parallel VLSI Architectures for Cryptographic Systems
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FCCM
2002
IEEE
126views VLSI» more  FCCM 2002»
14 years 1 months ago
Hyperspectral Image Compression on Reconfigurable Platforms
NASA’s satellites currently do not make use of advanced image compression techniques during data transmission to earth because of limitations in the available platforms. With th...
Thomas W. Fry, Scott Hauck
FCCM
2006
IEEE
100views VLSI» more  FCCM 2006»
14 years 2 months ago
Enabling a Uniform Programming Model Across the Software/Hardware Boundary
In this paper, we present hthreads, a unifying programming model for specifying application threads running within a hybrid CPU/FPGA system. Threads are specified from a single p...
Erik Anderson, Jason Agron, Wesley Peck, Jim Steve...
ISVLSI
2005
IEEE
169views VLSI» more  ISVLSI 2005»
14 years 2 months ago
High Performance Array Processor for Video Decoding
high NRE cost. Therefore, general purpose programmable processors using software to perform various functions become more attractive since programmability can simplify system devel...
J. Lee, Narayanan Vijaykrishnan, Mary Jane Irwin
CODES
2005
IEEE
14 years 2 months ago
System-level design automation tools for digital microfluidic biochips
Biochips based on digital microfluidics offer a powerful platform for massively parallel biochemical analysis such as clinical diagnosis and DNA sequencing. Current full-custom de...
Krishnendu Chakrabarty, Fei Su
FCCM
2006
IEEE
133views VLSI» more  FCCM 2006»
14 years 2 months ago
A Scalable FPGA-based Multiprocessor
It has been shown that a small number of FPGAs can significantly accelerate certain computing tasks by up to two or three orders of magnitude. However, particularly intensive lar...
Arun Patel, Christopher A. Madill, Manuel Salda&nt...