52 search results - page 9 / 11 » Parallel VLSI Architectures for Cryptographic Systems |
VLSID
2002
IEEE
14 years 9 months ago
2002
IEEE
Various calculation of matrices and vectors has been used in many digital signal processing systems. Although the calculation simply repeats multiplication and addition, the reite...
ASYNC
2003
IEEE
14 years 1 months ago
2003
IEEE
We present a high-speed, clockless, serial link transceiver for inter-chip communication in asynchronous VLSI systems. Serial link transceivers achieve high offchip data rates by ...
ICDCS
2006
IEEE
14 years 2 months ago
2006
IEEE
We propose a peer-to-peer architecture designed to overcome asymmetries in upload/download speeds that are typical in end-user dialup, broadband and cellular wireless Internet con...
FPL
2008
Springer
13 years 10 months ago
2008
Springer
Cryptanalysis of symmetric and asymmetric ciphers is a challenging task due to the enormous amount of involved computations. To tackle this computational complexity, usually the e...
VLSID
2009
IEEE
14 years 9 months ago
2009
IEEE
Abstract--Digital control for embedded systems often requires low-power, hard real-time computation to satisfy high control-loop bandwidth, low latency, and low-power requirements....