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SASP
2008
IEEE
94views Hardware» more  SASP 2008»
14 years 1 months ago
An MDCT Hardware Accelerator for MP3 Audio
— With the increasing popularity of MP3 audio, there is a need to develop cost and power efficient architectures for the MP3 encoder and decoder. This paper describes dedicated ...
Xingdong Dai, Meghanad D. Wagh
DEBS
2010
ACM
13 years 10 months ago
Evaluation of streaming aggregation on parallel hardware architectures
We present a case study parallelizing streaming aggregation on three different parallel hardware architectures. Aggregation is a performance-critical operation for data summarizat...
Scott Schneider, Henrique Andrade, Bugra Gedik, Ku...
ASAP
2009
IEEE
159views Hardware» more  ASAP 2009»
14 years 1 months ago
A High-Performance Hardware Architecture for Spectral Hash Algorithm
—The Spectral Hash algorithm is one of the Round 1 candidates for the SHA-3 family, and is based on spectral arithmetic over a finite field, involving multidimensional discrete...
Ray C. C. Cheung, Çetin K. Koç, John...
MVA
2011
234views Computer Vision» more  MVA 2011»
13 years 1 months ago
Feature tracking and matching in video using programmable graphics hardware
Abstract This paper describes novel implementations of the KLT feature tracking and SIFT feature extraction algorithms that run on the graphics processing unit (GPU) and is suitabl...
Sudipta N. Sinha, Jan-Michael Frahm, Marc Pollefey...
SBACPAD
2006
IEEE
148views Hardware» more  SBACPAD 2006»
14 years 22 days ago
Scalable Parallel Implementation of Bayesian Network to Junction Tree Conversion for Exact Inference
We present a scalable parallel implementation for converting a Bayesian network to a junction tree, which can then be used for a complete parallel implementation for exact inferen...
Vasanth Krishna Namasivayam, Animesh Pathak, Vikto...