462 search results - page 21 / 93 » Parallel algorithm for hardware implementation of inverse ha... |
SI3D
2006
ACM
14 years 1 months ago
2006
ACM
In this paper, we propose a new technique for hardware accelerated multi-resolution geometry synthesis. The level of detail for a given viewpoint is created on-the-fly, allowing f...
ICCS
2007
Springer
14 years 1 months ago
2007
Springer
This paper describes a signal recognition system that is jointly optimized from mathematical representation, algorithm design and final implementation. The goal is to exploit sign...
VIP
2001
13 years 8 months ago
2001
Recent developments in reconfigurable hardware technologies have offered high-density high-speed devices with the ability for custom computing whilst maintaining the flexibility o...
ASAP
2003
IEEE
14 years 19 days ago
2003
IEEE
This paper introduces basic principles for extending the classical systolic synthesis methodology to multi-dimensional time. Multi-dimensional scheduling enables complex algorithm...
ASAP
2000
IEEE
13 years 11 months ago
2000
IEEE
High level modeling and (quantitative) performance analysis of signal processing systems requires high level models for the applications(algorithms) and the implementations (archi...