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CHES
2005
Springer
156views Cryptology» more  CHES 2005»
14 years 7 days ago
A Very Compact S-Box for AES
A key step in the Advanced Encryption Standard (AES) algorithm is the “S-box.” Many implementations of AES have been proposed, for various goals, that effect the S-box in vari...
David Canright
CHES
2004
Springer
106views Cryptology» more  CHES 2004»
13 years 10 months ago
XTR Implementation on Reconfigurable Hardware
Abstract. Recently, Lenstra and Verheul proposed an efficient cryptosystem called XTR. This system represents elements of F p6 with order dividing p2 -p+1 by their trace over Fp2 ....
Eric Peeters, Michael Neve, Mathieu Ciet
PODC
2011
ACM
12 years 9 months ago
On the power of hardware transactional memory to simplify memory management
Dynamic memory management is a significant source of complexity in the design and implementation of practical concurrent data structures. We study how hardware transactional memo...
Aleksandar Dragojevic, Maurice Herlihy, Yossi Lev,...
MSS
2003
IEEE
113views Hardware» more  MSS 2003»
13 years 12 months ago
Design and Implementation of Multiple Addresses Parallel Transmission Architecture for Storage Area Network
In this paper, we present a parallel transmission architecture for SAN. By using two schedulers on the destination and source addresses of packets, the load of multiple data flows...
Bin Meng, Patrick B. T. Khoo, T. C. Chong
HPDC
1993
IEEE
13 years 10 months ago
An Analysis of Distributed Computing Software and Hardware for Applications in Computational Physics
We have implemented a set of computational physics codes on a network of IBM RS/6000 workstations used as a distributed parallel computer. We compare the performance of the codes ...
Paul D. Coddington