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IEEEPACT
2006
IEEE
14 years 22 days ago
Communist, utilitarian, and capitalist cache policies on CMPs: caches as a shared resource
As chip multiprocessors (CMPs) become increasingly mainstream, architects have likewise become more interested in how best to share a cache hierarchy among multiple simultaneous t...
Lisa R. Hsu, Steven K. Reinhardt, Ravishankar R. I...
IEEEPACT
2006
IEEE
14 years 22 days ago
Self-checking instructions: reducing instruction redundancy for concurrent error detection
With reducing feature size, increasing chip capacity, and increasing clock speed, microprocessors are becoming increasingly susceptible to transient (soft) errors. Redundant multi...
Sumeet Kumar, Aneesh Aggarwal
IEEEPACT
2006
IEEE
14 years 22 days ago
Hardware support for spin management in overcommitted virtual machines
Multiprocessor operating systems (OSs) pose several unique and conflicting challenges to System Virtual Machines (System VMs). For example, most existing system VMs resort to gan...
Philip M. Wells, Koushik Chakraborty, Gurindar S. ...
BROADNETS
2005
IEEE
14 years 10 days ago
Using location information for scheduling in 802.15.3 MAC
— In recent years, UWB has received much attention as a suitable Physical Layer (PHY) for Wireless Personal Area Networks (WPANS). UWB allows for low cost, low power, high bandwi...
Sethuram Balaji Kodeswaran, Anupam Joshi
IEEEPACT
2005
IEEE
14 years 9 days ago
Dual-Core Execution: Building a Highly Scalable Single-Thread Instruction Window
Current integration trends embrace the prosperity of single-chip multi-core processors. Although multi-core processors deliver significantly improved system throughput, single-thr...
Huiyang Zhou