770 search results - page 10 / 154 » Parallel simulation of chip-multiprocessor architectures |
IEEEPACT
2008
IEEE
14 years 2 months ago
2008
IEEE
Both commercial and scientific workloads benefit from concurrency and exhibit data sharing across threads/processes. The resulting sharing patterns are often fine-grain, with t...
CF
2009
ACM
14 years 2 months ago
2009
ACM
Chip Multiprocessor (CMP) memory systems suffer from the effects of destructive thread interference. This interference reduces performance predictability because it depends heavil...
ICS
2007
Tsinghua U.
14 years 2 months ago
2007
Tsinghua U.
This paper presents Cooperative Cache Partitioning (CCP) to allocate cache resources among threads concurrently running on CMPs. Unlike cache partitioning schemes that use a singl...
HPCA
2007
IEEE
14 years 8 months ago
2007
IEEE
It is widely accepted that transient failures will appear more frequently in chips designed in the near future due to several factors such as the increased integration scale. On t...
ICS
2000
Tsinghua U.
14 years 14 hour ago
2000
Tsinghua U.
The rapid advancements of networking technology have boosted potential bandwidth to the point that the cabling is no longer the bottleneck. Rather, the bottlenecks lie at the cros...