770 search results - page 16 / 154 » Parallel simulation of chip-multiprocessor architectures |
119
Voted
IEEEPACT
2008
IEEE
15 years 9 months ago
2008
IEEE
This paper presents and characterizes the Princeton Application Repository for Shared-Memory Computers (PARSEC), a benchmark suite for studies of Chip-Multiprocessors (CMPs). Prev...
132
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HPCA
2003
IEEE
16 years 3 months ago
2003
IEEE
Java-based middleware, and application servers in particular, are rapidly gaining importance as a new class of workload for commercial multiprocessor servers. SPEC has recognized ...
125
Voted
HPCA
2009
IEEE
15 years 10 months ago
2009
IEEE
On-network hardware support for multi-destination traffic is a desirable feature in most multiprocessor machines. Multicast hardware capabilities enable much more effective bandwi...
154
Voted
IEEEPACT
2006
IEEE
15 years 9 months ago
2006
IEEE
As chip multiprocessors (CMPs) become increasingly mainstream, architects have likewise become more interested in how best to share a cache hierarchy among multiple simultaneous t...
256
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GLVLSI
2011
IEEE
14 years 7 months ago
2011
IEEE
This paper proposes a novel L1 data cache design with dualversioning SRAM cells (dvSRAM) for chip multi-processors (CMP) that implement optimistic concurrency proposals. In this n...