770 search results - page 44 / 154 » Parallel simulation of chip-multiprocessor architectures |
CF
2008
ACM
13 years 11 months ago
2008
ACM
To meet growing terabit link rates, highly parallel and scalable architectures are needed for IP lookup engines in next generation routers. This paper proposes an SRAM-based multi...
ISCAS
2006
IEEE
14 years 3 months ago
2006
IEEE
— This paper proposes a new reconfigurable architecture for multi-media and wireless communications. The proposed architecture addresses three critical design issues with the loo...
IPPS
2008
IEEE
14 years 4 months ago
2008
IEEE
We present an auto-tuning approach to optimize application performance on emerging multicore architectures. The methodology extends the idea of searchbased performance optimizatio...
ISCAS
2007
IEEE
14 years 4 months ago
2007
IEEE
In this paper, an efficient VLSI architecture for a fast computation of the 2-D discrete wavelet transform (DWT) is proposed. The architecture employing a three-stage cascade in p...
IEEEPACT
2000
IEEE
14 years 2 months ago
2000
IEEE
Multimedia instruction set extensions have become a prominent feature in desktop microprocessor platforms, promising superior performance on a wide range of floating-point and int...