770 search results - page 67 / 154 » Parallel simulation of chip-multiprocessor architectures |
121
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EUROPAR
2004
Springer
15 years 9 months ago
2004
Springer
Abstract. Simulation platforms for network processing still have difficulties in finding a good compromise between speed and accuracy. This makes it difficult to identify the caus...
ICMCS
2005
IEEE
15 years 9 months ago
2005
IEEE
This paper presents a novel quarter pel full search block motion estimation architecture for H.264/AVC encoder. The proposed architecture is capable of calculating all 41 motion v...
125
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IPPS
1996
IEEE
15 years 7 months ago
1996
IEEE
A new VLSI architecture for real-time pipeline FFT processor is proposed. A hardware oriented radix-22 algorithm is derived by integrating a twiddle factor decomposition technique ...
152
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ISCAPDCS
2003
15 years 4 months ago
2003
This paper presents the Dynamic Simultaneous Multithreaded Architecture (DSMT). DSMT efficiently executes multiple threads from a single program on a SMT processor core. To accomp...
108
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ISCA
2000
IEEE
15 years 7 months ago
2000
IEEE
Spatial-lattice computations with finite-range interactions are an important class of easily parallelized computations. This class includes many simple and direct algorithms for ...