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» Parallel simulation of chip-multiprocessor architectures
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139
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PPOPP
2003
ACM
15 years 8 months ago
Impala: a middleware system for managing autonomic, parallel sensor systems
Sensor networks are long-running computer systems with many sensing/compute nodes working to gather information about their environment, process and fuse that information, and in ...
Ting Liu, Margaret Martonosi
140
Voted
ARCS
2006
Springer
15 years 7 months ago
Estimating Energy Consumption for an MPSoC Architectural Exploration
Early energy estimation is increasingly important in MultiProcessor System-On-Chip (MPSoC) design. Applying traditional approaches, which consist in delaying the estimation until t...
Rabie Ben Atitallah, Smaïl Niar, Alain Greine...
168
Voted
ISCA
2006
IEEE
123views Hardware» more  ISCA 2006»
15 years 3 months ago
A Gracefully Degrading and Energy-Efficient Modular Router Architecture for On-Chip Networks
Packet-based on-chip networks are increasingly being adopted in complex System-on-Chip (SoC) designs supporting numerous homogeneous and heterogeneous functional blocks. These Net...
Jongman Kim, Chrysostomos Nicopoulos, Dongkook Par...
158
Voted
HPCA
1998
IEEE
15 years 7 months ago
Performance Study of a Concurrent Multithreaded Processor
The performance of a concurrent multithreaded architectural model, called superthreading 15 , is studied in this paper. It tries to integrate optimizing compilation techniques and...
Jenn-Yuan Tsai, Zhenzhen Jiang, Eric Ness, Pen-Chu...
140
Voted
CCGRID
2005
IEEE
15 years 9 months ago
A distributed resource and network partitioning architecture for service grids
Abstract In this paper, we propose the use of a distributed service management architecture for state-of-the-art service-enabled Grids. The architecture is capable of performing au...
Bruno Volckaert, Pieter Thysebaert, Marc De Leenhe...