770 search results - page 96 / 154 » Parallel simulation of chip-multiprocessor architectures |
150
Voted
IEEEPACT
2005
IEEE
15 years 9 months ago
2005
IEEE
VLIW architectures are popular in embedded systems because they offer high-performance processing at low cost and energy. The major problem with traditional VLIW designs is that t...
94
Voted
CGO
2006
IEEE
15 years 9 months ago
2006
IEEE
Explicit Data Graph Execution (EDGE) architectures offer the possibility of high instruction-level parallelism with energy efficiency. In EDGE architectures, the compiler breaks ...
114
Voted
HPCS
2006
IEEE
15 years 9 months ago
2006
IEEE
This paper presents the initial design of the Cyclops-64 (C64) system software infrastructure and tools under development as a joint effort between IBM T.J. Watson Research Center...
127
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HPCA
2005
IEEE
16 years 3 months ago
2005
IEEE
This paper studies the impact of L2 cache sharing on threads that simultaneously share the cache, on a Chip Multi-Processor (CMP) architecture. Cache sharing impacts threads non-u...
138
Voted
ICS
2003
Tsinghua U.
15 years 8 months ago
2003
Tsinghua U.
We describe the architecture for a single-chip aegis processor which can be used to build computing systems secure against both physical and software attacks. Our architecture ass...