1761 search results - page 13 / 353 » Parallel timing simulation on a distributed memory multiproc... |
ANSS
2001
IEEE
13 years 11 months ago
2001
IEEE
IPPS
1999
IEEE
13 years 11 months ago
1999
IEEE
In this paper we propose a simple extension to the I/O architecture of scalable multiprocessors that optimizes page swap-outs significantly. More specifically, we propose the use o...
IEEEPACT
2003
IEEE
14 years 25 days ago
2003
IEEE
We investigate the implementation of IP look-up for core routers using multiple microengines and a tailored memory hierarchy. The main architectural concerns are limiting the numb...
WSC
2001
13 years 9 months ago
2001
The problem of efficient load distribution and scaling of large-scale wireless communication system simulation on multiprocessor architectures (both shared memory and cluster arra...
DAC
1999
ACM
13 years 12 months ago
1999
ACM
: In this work we propose a technique for spatial and temporal partitioning of a logic circuit based on the nodes activity computed by using a simulation at an higher level of ion....