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HPCC
2007
Springer
14 years 1 months ago
Parallel Performance Prediction for Multigrid Codes on Distributed Memory Architectures
We propose a model for describing the parallel performance of multigrid software on distributed memory architectures. The goal of the model is to allow reliable predictions to be m...
Giuseppe Romanazzi, Peter K. Jimack
MICRO
2006
IEEE
113views Hardware» more  MICRO 2006»
13 years 7 months ago
Exploiting Fine-Grained Data Parallelism with Chip Multiprocessors and Fast Barriers
We examine the ability of CMPs, due to their lower onchip communication latencies, to exploit data parallelism at inner-loop granularities similar to that commonly targeted by vec...
Jack Sampson, Rubén González, Jean-F...
DATE
2005
IEEE
165views Hardware» more  DATE 2005»
14 years 1 months ago
Flexible Hardware/Software Support for Message Passing on a Distributed Shared Memory Architecture
With the advent of multi-processor systems on a chip, the interest for message passing libraries has revived. Message passing helps in mastering the design complexity of parallel ...
Francesco Poletti, Antonio Poggiali, Paul Marchal
EUROPAR
2007
Springer
14 years 1 months ago
A Scheduling Toolkit for Multiprocessor-Task Programming with Dependencies
The performance of many scientific applications for distributed memory platforms can be increased by utilizing multiprocessor-task programming. To obtain the minimum parallel runt...
Jörg Dümmler, Raphael Kunis, Gudula R&uu...
IPPS
1996
IEEE
13 years 11 months ago
A Virtual Memory Model for Parallel Supercomputers
A model for virtual memory in a distributed memory parallel computer is proposed. It uses a novel parallel computing operating system framework and leads to the definition of two ...
Veronica L. M. Reis, Isaac D. Scherson