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IPPS
2009
IEEE
14 years 5 months ago
Core-aware memory access scheduling schemes
Multi-core processors have changed the conventional hardware structure and require a rethinking of system scheduling and resource management to utilize them efficiently. However, ...
Zhibin Fang, Xian-He Sun, Yong Chen, Surendra Byna
DATE
2000
IEEE
140views Hardware» more  DATE 2000»
14 years 2 months ago
Parallel and Distributed VHDL Simulation
This paper presents a methodology for parallel and distributed simulation of VHDL using the PDES (parallel discrete-event simulation) paradigm. To achieve better features and perf...
Dragos Lungeanu, C.-J. Richard Shi
RTAS
2006
IEEE
14 years 4 months ago
METERG: Measurement-Based End-to-End Performance Estimation Technique in QoS-Capable Multiprocessors
Multiprocessor systems present serious challenges in the design of real-time systems due to the wider variation of execution time of an instruction sequence compared to a uniproce...
Jae W. Lee, Krste Asanovic
PADS
2005
ACM
14 years 4 months ago
XTW, A Parallel and Distributed Logic Simulator
— In this paper, a new event scheduling mechanism XEQ and a new rollback procedure rb-messages are proposed for use in optimistic logic simulation. We incorporate both of these t...
Qing Xu 0004, Carl Tropper
JSSPP
2000
Springer
14 years 2 months ago
Time-Sharing Parallel Jobs in the Presence of Multiple Resource Requirements
Abstract. Buffered coscheduling is a new methodology that can substantially increase resource utilization, improve response time, and simplify the development of the run-time suppo...
Fabrizio Petrini, Wu-chun Feng