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IPPS
2003
IEEE
14 years 3 months ago
Flexible CoScheduling: Mitigating Load Imbalance and Improving Utilization of Heterogeneous Resources
Fine-grained parallel applications require all their processes to run simultaneously on distinct processors to achieve good efficiency. This is typically accomplished by space sl...
Eitan Frachtenberg, Dror G. Feitelson, Fabrizio Pe...
IPPS
2000
IEEE
14 years 2 months ago
Controlling Distributed Shared Memory Consistency from High Level Programming Languages
One of the keys for the success of parallel processing is the availability of high-level programming languages for on-the-shelf parallel architectures. Using explicit message passi...
Yvon Jégou
ICS
1999
Tsinghua U.
14 years 2 months ago
Reorganizing global schedules for register allocation
Instruction scheduling is an important compiler technique for exploiting more instruction-level parallelism (ILP) in high-performance microprocessors, and in this paper, we study ...
Gang Chen, Michael D. Smith
ICS
1999
Tsinghua U.
14 years 2 months ago
Low-level router design and its impact on supercomputer system performance
Supercomputer performance is highly dependent on its interconnection subsystem design. In this paper we study how di erent architectural approaches for router design impact into s...
Valentin Puente, José A. Gregorio, Cruz Izu...
SIBGRAPI
2005
IEEE
14 years 3 months ago
Linear Complexity Stereo Matching Based on Region Indexing
This paper presents a linear complexity method for real-time stereo matching, in which the processing time is only dependent on the image resolution. Regions along each epipolar l...
Marco Antonio Floriano de Oliveira, Raul Sidnei Wa...