Sciweavers

7456 search results - page 1457 / 1492
» Parallelism in Logic Programming
Sort
View
SEMWEB
2007
Springer
14 years 1 months ago
Semantic Enterprise Technologies
Abstract. Nowadays enterprises request information technologies that leverage structured and unstructured information for providing a single integrated view of business problems in...
Massimo Ruffolo, Luigi Guadagno, Inderbir Sidhu
MICRO
2006
IEEE
84views Hardware» more  MICRO 2006»
14 years 1 months ago
Reunion: Complexity-Effective Multicore Redundancy
To protect processor logic from soft errors, multicore redundant architectures execute two copies of a program on separate cores of a chip multiprocessor (CMP). Maintaining identi...
Jared C. Smolens, Brian T. Gold, Babak Falsafi, Ja...
RTSS
2006
IEEE
14 years 1 months ago
MCGREP - A Predictable Architecture for Embedded Real-Time Systems
Real-time systems design involves many important choices, including that of the processor. The fastest processors achieve performance by utilizing architectural features that make...
Jack Whitham, Neil C. Audsley
VEE
2006
ACM
155views Virtualization» more  VEE 2006»
14 years 1 months ago
A feather-weight virtual machine for windows applications
Many fault-tolerant and intrusion-tolerant systems require the ability to execute unsafe programs in a realistic environment without leaving permanent damages. Virtual machine tec...
Yang Yu, Fanglu Guo, Susanta Nanda, Lap-Chung Lam,...
CGO
2005
IEEE
14 years 1 months ago
Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache
Modern embedded microprocessors use low power on-chip memories called scratch-pad memories to store frequently executed instructions and data. Unlike traditional caches, scratch-p...
Rajiv A. Ravindran, Pracheeti D. Nagarkar, Ganesh ...
« Prev « First page 1457 / 1492 Last » Next »