Sciweavers

7456 search results - page 1399 / 1492
» Parallelism in Logic Programs
Sort
View
CC
2003
Springer
14 years 3 months ago
Early Control of Register Pressure for Software Pipelined Loops
Abstract. The register allocation in loops is generally performed after or during the software pipelining process. This is because doing a conventional register allocation at firs...
Sid Ahmed Ali Touati, Christine Eisenbeis
EUROPAR
2003
Springer
14 years 3 months ago
Partial Redundancy Elimination with Predication Techniques
Partial redundancy elimination (PRE) techniques play an important role in optimizing compilers. Many optimizations, such as elimination of redundant expressions, communication opti...
Bernhard Scholz, Eduard Mehofer, R. Nigel Horspool
ICS
2003
Tsinghua U.
14 years 3 months ago
Selecting long atomic traces for high coverage
This paper performs a comprehensive investigation of dynamic selection for long atomic traces. It introduces a classification of trace selection methods and discusses existing and...
Roni Rosner, Micha Moffie, Yiannakis Sazeides, Ron...
ISCA
2010
IEEE
189views Hardware» more  ISCA 2010»
14 years 3 months ago
RETCON: transactional repair without replay
Over the past decade there has been a surge of academic and industrial interest in optimistic concurrency, i.e. the speculative parallel execution of code regions that have the se...
Colin Blundell, Arun Raghavan, Milo M. K. Martin
ISCA
2010
IEEE
232views Hardware» more  ISCA 2010»
14 years 3 months ago
Data marshaling for multi-core architectures
Previous research has shown that Staged Execution (SE), i.e., dividing a program into segments and executing each segment at the core that has the data and/or functionality to bes...
M. Aater Suleman, Onur Mutlu, José A. Joao,...
« Prev « First page 1399 / 1492 Last » Next »