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CLEIEJ
2002
113views more  CLEIEJ 2002»
13 years 7 months ago
The MT Stack: Paging Algorithm and Performance in a Distributed Virtual Memory System
Advances in parallel computation are of central importance to Artificial Intelligence due to the significant amount of time and space their programs require. Functional languages ...
Marco T. Morazán, Douglas R. Troeger, Myles...
IPPS
2006
IEEE
14 years 1 months ago
Multi-clock pipelined design of an IEEE 802.11a physical layer transmitter
Among different wireless LAN technologies 802.11a has recently become popular due to its high throughput, large system capacity, and relatively long range. In this paper, we prop...
Maryam Mizani, Daler N. Rakhmatov
DAC
2005
ACM
14 years 8 months ago
A non-parametric approach for dynamic range estimation of nonlinear systems
It has been widely recognized that the dynamic range information of an application can be exploited to reduce the datapath bitwidth of either processors or ASICs, and therefore th...
Bin Wu, Jianwen Zhu, Farid N. Najm
DATE
2009
IEEE
138views Hardware» more  DATE 2009»
14 years 2 months ago
Hardware/software co-design architecture for thermal management of chip multiprocessors
—The sustained push for performance, transistor count, and instruction level parallelism has reached a point where chip level power density issues are at the forefront of design ...
Omer Khan, Sandip Kundu
EMSOFT
2006
Springer
13 years 11 months ago
New approach to architectural synthesis: incorporating QoS constraint
Embedded applications like video decoding, video streaming and those in the network domain, typically have a Quality of Service (QoS) requirement which needs to be met. Apart from...
Harsh Dhand, Basant Kumar Dwivedi, M. Balakrishnan