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» Parallelism through Digital Circuit Design
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ASAP
2008
IEEE
142views Hardware» more  ASAP 2008»
14 years 2 months ago
Managing multi-core soft-error reliability through utility-driven cross domain optimization
As semiconductor processing technology continues to scale down, managing reliability becomes an increasingly difficult challenge in high-performance microprocessor design. Transie...
Wangyuan Zhang, Tao Li
SIAMCOMP
2000
66views more  SIAMCOMP 2000»
13 years 7 months ago
Computations of Uniform Recurrence Equations Using Minimal Memory Size
We consider a system of uniform recurrence equations (URE) of dimension one. We show how its computation can be carried out using minimal memory size with several synchronous proc...
Bruno Gaujal, Alain Jean-Marie, Jean Mairesse
SBCCI
2006
ACM
200views VLSI» more  SBCCI 2006»
14 years 1 months ago
A differential switched-capacitor amplifier with programmable gain and output offset voltage
The design of a low-power differential switched-capacitor amplifier for processing a fully-differential input signal coming from a pressure sensor interface is reported. The circu...
Fabio Lacerda, Stefano Pietri, Alfredo Olmos
FPGA
2010
ACM
182views FPGA» more  FPGA 2010»
13 years 5 months ago
A comprehensive approach to modeling, characterizing and optimizing for metastability in FPGAs
Metastability is a phenomenon that can cause system failures in digital circuits. It may occur whenever signals are being transmitted across asynchronous or unrelated clock domain...
Doris Chen, Deshanand Singh, Jeffrey Chromczak, Da...
ICCAD
2001
IEEE
143views Hardware» more  ICCAD 2001»
14 years 4 months ago
Transient Power Management Through High Level Synthesis
The use of nanometer technologies is making it increasingly important to consider transient characteristics of a circuit’s power dissipation (e.g., peak power, and power gradien...
Vijay Raghunathan, Srivaths Ravi, Anand Raghunatha...