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» Parallelism through Digital Circuit Design
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ISCAS
2005
IEEE
191views Hardware» more  ISCAS 2005»
14 years 1 months ago
Behavioural modeling and simulation of a switched-current phase locked loop
Recent work has shown that the use of switched current methods can provide an effective route to implementation of analog IC functionality using a standard digital CMOS process. Fu...
Peter R. Wilson, Reuben Wilcock
CONCUR
2001
Springer
14 years 2 days ago
The Control of Synchronous Systems, Part II
Abstract. A controller is an environment for a system that achieves a particular control objective by providing inputs to the system without constraining the choices of the system....
Luca de Alfaro, Thomas A. Henzinger, Freddy Y. C. ...
GRID
2008
Springer
13 years 7 months ago
A Secure Grid Medical Data Manager Interfaced to the gLite Middleware
The medical community is producing and manipulating a tremendous volume of digital data for which computerized archiving, processing and analysis is needed. Grid infrastructures ar...
Johan Montagnat, Ákos Frohner, Daniel Jouve...
HPCA
2006
IEEE
14 years 8 months ago
BulletProof: a defect-tolerant CMP switch architecture
As silicon technologies move into the nanometer regime, transistor reliability is expected to wane as devices become subject to extreme process variation, particle-induced transie...
Kypros Constantinides, Stephen Plaza, Jason A. Blo...
DELTA
2006
IEEE
13 years 11 months ago
Implementation of Four Real-Time Software Defined Receivers and a Space-Time Decoder using Xilinx Virtex 2 Pro Field Programmabl
This paper describes the concept, architecture, development and demonstration of a real time, high performance, software defined 4-receiver system and a space time decoder to be i...
Peter J. Green, Desmond P. Taylor