Sciweavers

166 search results - page 23 / 34
» Parallelization of a wave propagation application using a da...
Sort
View
PPOPP
2009
ACM
14 years 8 months ago
A compiler-directed data prefetching scheme for chip multiprocessors
Data prefetching has been widely used in the past as a technique for hiding memory access latencies. However, data prefetching in multi-threaded applications running on chip multi...
Dhruva Chakrabarti, Mahmut T. Kandemir, Mustafa Ka...
SIGMETRICS
2011
ACM
178views Hardware» more  SIGMETRICS 2011»
13 years 2 months ago
Should we worry about memory loss?
In recent years the High Performance Computing (HPC) industry has benefited from the development of higher density multi-core processors. With recent chips capable of executing u...
O. Perks, Simon D. Hammond, S. J. Pennycook, Steph...
BMCBI
2008
115views more  BMCBI 2008»
13 years 7 months ago
BioGraphE: high-performance bionetwork analysis using the Biological Graph Environment
Background: Graphs and networks are common analysis representations for biological systems. Many traditional graph algorithms such as k-clique, k-coloring, and subgraph matching h...
George Chin Jr., Daniel G. Chavarría-Mirand...
HIPC
1999
Springer
13 years 11 months ago
Microcaches
We describe a radically new cache architecture and demonstrate that it offers a huge reduction in cache cost, size and power consumption whilst maintaining performance on a wide ra...
David May, Dan Page, James Irwin, Henk L. Muller
PPOPP
2009
ACM
14 years 8 months ago
A comparison of programming models for multiprocessors with explicitly managed memory hierarchies
On multiprocessors with explicitly managed memory hierarchies (EMM), software has the responsibility of moving data in and out of fast local memories. This task can be complex and...
Scott Schneider, Jae-Seung Yeom, Benjamin Rose, Jo...