Users and administrators of large distributed systems are frequently in need of monitoring and management of its various components, data items and resources. Though there exist s...
Md. Ahsan Arefin, Md. Yusuf Sarwar Uddin, Indranil...
Technology trends are driving parallel on-chip architectures in the form of multi-processor systems-on-a-chip (MPSoCs) and chip multi-processors (CMPs). In these systems the incre...
Vassos Soteriou, Noel Eisley, Hangsheng Wang, Bin ...
With shrinking feature size and growing integration density in the Deep Sub-Micron technologies, the global buses are fast becoming the “weakest-links” in VLSI design. They ha...
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
Many applications need to respond to incremental modifications to data. Being incremental, such modification often require incremental modifications to the output, making it po...