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ICECCS
2010
IEEE
196views Hardware» more  ICECCS 2010»
13 years 8 months ago
Implementing and Evaluating a Model Checker for Transactional Memory Systems
Abstract—Transactional Memory (TM) is a promising technique that addresses the difficulty of parallel programming. Since TM takes responsibility for all concurrency control, TM ...
Woongki Baek, Nathan Grasso Bronson, Christos Kozy...
IPPS
2010
IEEE
13 years 6 months ago
Structuring the execution of OpenMP applications for multicore architectures
Abstract--The now commonplace multi-core chips have introduced, by design, a deep hierarchy of memory and cache banks within parallel computers as a tradeoff between the user frien...
François Broquedis, Olivier Aumage, Brice G...
CLUSTER
2009
IEEE
13 years 6 months ago
Design alternatives for implementing fence synchronization in MPI-2 one-sided communication for InfiniBand clusters
Scientific computing has seen an immense growth in recent years. The Message Passing Interface (MPI) has become the de-facto standard for parallel programming model for distribute...
Gopalakrishnan Santhanaraman, Tejus Gangadharappa,...
SPAA
2009
ACM
14 years 3 months ago
Distributed algorithms for QoS load balancing
We consider a dynamic load balancing scenario in which users allocate resources in a non-cooperative and selfish fashion. The perceived performance of a resource for a user decre...
Heiner Ackermann, Simon Fischer, Martin Hoefer, Ma...
ICPPW
2009
IEEE
14 years 3 months ago
Dynamic Control and Resource Allocation in Wireless-Infrastructured Distributed Cellular Networks with OFDMA
—In this paper, we consider joint optimization of end-to-end data transmission and resource allocation for Wireless-Infrastructured Distributed Cellular Networks (WIDCNs), where ...
Lei You, Ping Wu, Mei Song, Junde Song, Yong Zhang
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