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EUROPAR
2003
Springer
14 years 1 months ago
Partial Redundancy Elimination with Predication Techniques
Partial redundancy elimination (PRE) techniques play an important role in optimizing compilers. Many optimizations, such as elimination of redundant expressions, communication opti...
Bernhard Scholz, Eduard Mehofer, R. Nigel Horspool
ICS
2003
Tsinghua U.
14 years 1 months ago
Selecting long atomic traces for high coverage
This paper performs a comprehensive investigation of dynamic selection for long atomic traces. It introduces a classification of trace selection methods and discusses existing and...
Roni Rosner, Micha Moffie, Yiannakis Sazeides, Ron...
ISCA
2010
IEEE
189views Hardware» more  ISCA 2010»
14 years 1 months ago
RETCON: transactional repair without replay
Over the past decade there has been a surge of academic and industrial interest in optimistic concurrency, i.e. the speculative parallel execution of code regions that have the se...
Colin Blundell, Arun Raghavan, Milo M. K. Martin
ISCA
2010
IEEE
232views Hardware» more  ISCA 2010»
14 years 1 months ago
Data marshaling for multi-core architectures
Previous research has shown that Staged Execution (SE), i.e., dividing a program into segments and executing each segment at the core that has the data and/or functionality to bes...
M. Aater Suleman, Onur Mutlu, José A. Joao,...
FCCM
2002
IEEE
127views VLSI» more  FCCM 2002»
14 years 1 months ago
Hardware-Assisted Fast Routing
To fully realize the benefits of partial and rapid reconfiguration of field-programmable devices, we often need to dynamically schedule computing tasks and generate instance-sp...
André DeHon, Randy Huang, John Wawrzynek
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