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DAC
2009
ACM
14 years 10 months ago
Event-driven gate-level simulation with GP-GPUs
Logic simulation is a critical component of the design tool flow in modern hardware development efforts. It is used widely ? from high-level descriptions down to gate-level ones ?...
Debapriya Chatterjee, Andrew DeOrio, Valeria Berta...
DAC
1999
ACM
14 years 10 months ago
Power Efficient Mediaprocessors: Design Space Exploration
We present a framework for rapidly exploring the design space of low power application-specific programmable processors (ASPP), in particular mediaprocessors. We focus on a catego...
Johnson Kin, Chunho Lee, William H. Mangione-Smith...
MICCAI
2004
Springer
14 years 9 months ago
Implicit Active Shape Models for 3D Segmentation in MR Imaging
Extraction of structures of interest in medical images is often an arduous task because of noisy or incomplete data. However, handsegmented data are often available and most of the...
Mikaël Rousson, Nikos Paragios, Rachid Derich...
ICML
1997
IEEE
14 years 9 months ago
Predicting Multiprocessor Memory Access Patterns with Learning Models
Machine learning techniques are applicable to computer system optimization. We show that shared memory multiprocessors can successfully utilize machine learning algorithms for mem...
M. F. Sakr, Steven P. Levitan, Donald M. Chiarulli...
CC
2009
Springer
141views System Software» more  CC 2009»
14 years 9 months ago
Compile-Time Analysis and Specialization of Clocks in Concurrent Programs
Abstract. Clocks are a mechanism for providing synchronization barriers in concurrent programming languages. They are usually implemented using primitive communication mechanisms a...
Nalini Vasudevan, Olivier Tardieu, Julian Dolby, S...
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