5640 search results - page 1111 / 1128 » Parallelizing the Data Cube |
ICS
2003
Tsinghua U.
14 years 1 months ago
2003
Tsinghua U.
We describe the architecture for a single-chip aegis processor which can be used to build computing systems secure against both physical and software attacks. Our architecture ass...
CF
2010
ACM
14 years 1 months ago
2010
ACM
Per-core local (scratchpad) memories allow direct inter-core communication, with latency and energy advantages over coherent cache-based communication, especially as CMP architect...
ICPP
2002
IEEE
14 years 1 months ago
2002
IEEE
A software cache implements instruction and data caching entirely in software. Dynamic binary rewriting offers a means to specialize the software cache miss checks at cache miss t...
ICPPW
2002
IEEE
14 years 1 months ago
2002
IEEE
generally meta-data, so that documents on any specific subject can be transparently retrieved. While quality control can in principle still rely on the traditional methods of peer-...
ISCA
2010
IEEE
14 years 1 months ago
2010
IEEE
Given the multicore microprocessor revolution, we argue that the architecture research community needs a dramatic increase in simulation capacity. We believe FPGA Architecture Mod...