356 search results - page 50 / 72 » Parallelizing time with polynomial circuits |
ASAP
2005
IEEE
14 years 1 months ago
2005
IEEE
On public communication networks such as the Internet, data confidentiality can be provided by symmetric-key ciphers. One of the most common operations used in symmetric-key ciphe...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
Users and developers of grid applications have access to increasing numbers of resources. While more resources generally mean higher capabilities for an application, they also rai...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
The problem of data broadcasting over multiple channels consists in partitioning data among channels, depending on data popularities, and then cyclically transmitting them over ea...
ICCAD
2007
IEEE
2007
IEEE
Optimal polynomial-time interprocedural register allocation for high-level synthesis and ASIP design
14 years 4 months ago
—Register allocation, in high-level synthesis and ASIP design, is the process of determining the number of registers to include in the resulting circuit or processor. The goal is...
DAC
2010
ACM
13 years 12 months ago
2010
ACM
This paper studies the implementation of Boolean functions with lattices of two-dimensional switches. Each switch is controlled by a Boolean literal. If the literal is 1, the swit...