Sciweavers

15 search results - page 2 / 3
» Parameterized Verification of Transactional Memories
Sort
View
IPPS
2010
IEEE
13 years 4 months ago
Runtime checking of serializability in software transactional memory
Abstract--Ensuring the correctness of complex implementations of software transactional memory (STM) is a daunting task. Attempts have been made to formally verify STMs, but these ...
Arnab Sinha, Sharad Malik
DC
2010
13 years 7 months ago
Model checking transactional memories
Model checking software transactional memories (STMs) is difficult because of the unbounded number, length, and delay of concurrent transactions and the unbounded size of the memo...
Rachid Guerraoui, Thomas A. Henzinger, Vasu Singh
MICRO
2008
IEEE
137views Hardware» more  MICRO 2008»
13 years 7 months ago
Verification of chip multiprocessor memory systems using a relaxed scoreboard
Verification of chip multiprocessor memory systems remains challenging. While formal methods have been used to validate protocols, simulation is still the dominant method used to ...
Ofer Shacham, Megan Wachs, Alex Solomatnikov, Amin...
CAV
2004
Springer
140views Hardware» more  CAV 2004»
13 years 11 months ago
Indexed Predicate Discovery for Unbounded System Verification
Predicate abstraction has been proved effective for verifying several infinite-state systems. In predicate abstraction, an abstract system is automatinstructed given a set of predi...
Shuvendu K. Lahiri, Randal E. Bryant
POPL
2009
ACM
14 years 8 months ago
Feedback-directed barrier optimization in a strongly isolated STM
Speed improvements in today's processors have largely been delivered in the form of multiple cores, increasing the importance of ions that ease parallel programming. Software...
Nathan Grasso Bronson, Christos Kozyrakis, Kunle O...