149 search results - page 13 / 30 » Parametric Fault Simulation and Test Vector Generation |
ICCAD
1997
IEEE
13 years 11 months ago
1997
IEEE
Asynchronous circuits operate correctly only under timing assumptions. Hence testing those circuits for delay faults is crucial. This paper describes a three-step method to detect...
VLSID
1997
IEEE
13 years 11 months ago
1997
IEEE
The problem of test generation belongs to the class of NP-complete problems and it is becoming more and more di cult as the complexity of VLSI circuits increases, and as long as e...
IFIP
2001
Springer
13 years 11 months ago
2001
Springer
: High defect coverage requires good coverage of different fault types. In this paper, we present a comprehensive test vector generation technique for BIST, called Random Single In...
EURODAC
1995
IEEE
13 years 11 months ago
1995
IEEE
We examine delay models used in VLSI circuit testing. Our study includes electrical-level simulation experiments with HSPICE. We show phenomena which signi cantly a ect the actual...
CPHYSICS
2008
13 years 7 months ago
2008
Abstract. Neutrino telescopes are opening new opportunities in observational high energy astrophysics. In these detectors, atmospheric muons from primary cosmic ray interactions in...