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MTV
2006
IEEE
98views Hardware» more  MTV 2006»
14 years 4 months ago
Directed Micro-architectural Test Generation for an Industrial Processor: A Case Study
Simulation-based validation of the current industrial processors typically use huge number of test programs generated at instruction set architecture (ISA) level. However, archite...
Heon-Mo Koo, Prabhat Mishra, Jayanta Bhadra, Magdy...
DOCENG
2006
ACM
14 years 4 months ago
Live editing of hypermedia documents
In some hypermedia system applications, like interactive digital TV applications, authoring and presentation of documents may have to be done concomitantly. This is the case of li...
Romualdo Monteiro de Resende Costa, Márcio ...
PADS
2006
ACM
14 years 4 months ago
Aurora: An Approach to High Throughput Parallel Simulation
A master/worker paradigm for executing large-scale parallel discrete event simulation programs over networkenabled computational resources is proposed and evaluated. In contrast t...
Alfred Park, Richard M. Fujimoto
IEEEPACT
2005
IEEE
14 years 3 months ago
Design and Implementation of a Compiler Framework for Helper Threading on Multi-core Processors
Helper threading is a technique that utilizes a second core or logical processor in a multi-threaded system to improve the performance of the main thread. A helper thread executes...
Yonghong Song, Spiros Kalogeropulos, Partha Tiruma...
DIS
2005
Springer
14 years 3 months ago
Movement Analysis of Medaka (Oryzias Latipes) for an Insecticide Using Decision Tree
Abstract. Behavioral sequences of the medaka (Oryzias latipes) were continuously investigated through an automatic image recognition system in response to medaka treated with the i...
Sengtai Lee, Jeehoon Kim, Jae-Yeon Baek, Man-Wi Ha...