338 search results - page 55 / 68 » Partitioning of VLSI Circuits and Systems |
VLSID
2008
IEEE
14 years 9 months ago
2008
IEEE
Abstract-- With the continuous downscaling of CMOS technologies, the reliability has become a major bottleneck in the evolution of the next generation systems. Technology trends su...
CSUR
2006
13 years 8 months ago
2006
resents a perspective on existing NoC research. We define the following abstractions: system, network adapter, network, and link to explain and structure the fundamental concepts. ...
DAC
2005
ACM
14 years 9 months ago
2005
ACM
Achieving design closure is one of the biggest headaches for modern VLSI designers. This problem is exacerbated by high-level design automation tools that ignore increasingly impo...
TCAD
2008
13 years 8 months ago
2008
We present in this paper a new interconnect-driven multilevel floorplanner, called interconnect-driven multilevelfloorplanning framework (IMF), to handle large-scale buildingmodule...
TCAD
2010
13 years 3 months ago
2010
Design debugging is a major bottleneck in modern VLSI design flows as both the design size and the length of the error trace contribute to its inherent complexity. With typical des...