—A key challenge in chip multiprocessor (CMP) design is to optimize the performance within a power budget limited by the CMP’s cooling, packaging, and power supply capacities. ...
This paper proposes a thread partitioning algorithm in low power high-level synthesis. The algorithm is applied to high-level synthesis systems. In the systems, we can describe pa...
Abstract. We extend the Cayley-Sylvester formula for symmetric powers of SL2(C)modules, to plethysms defined by rectangle partitions. Ordinary partitions are replaced by plane par...
Abstract. A methodology is presented for tackling mixed-integer nonlinear optimization problems by local search, in particular large-scale real-life problems. This methodology is i...
We prove several results dealing with various counting functions for partitions of an integer into four squares of equal parity. Some are easy consequences of earlier work, but tw...