230 search results - page 27 / 46 » Performance Analysis of Parallel N-Body Codes |
CJ
2006
13 years 7 months ago
2006
Most microprocessor chips today use an out-of-order instruction execution mechanism. This mechanism allows superscalar processors to extract reasonably high levels of instruction ...
SERP
2003
13 years 9 months ago
2003
This paper presents an integrated set of tools for performance-oriented development of software targeted to distributed heterogeneous systems. Using these tools, software developm...
GLOBECOM
2009
IEEE
13 years 11 months ago
2009
IEEE
—In this paper, we present a novel method to construct nonbinary irregular LDPC codes whose parity check matrix has only column weights of 2 and t, where t ≥ 3. The constructed...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
The performance requirements for contemporary microprocessors are increasing as rapidly as their number of applications grows. By accelerating the clock, performance can be gained...
MICRO
2007
IEEE
14 years 1 months ago
2007
IEEE
Recently, the microprocessor industry has moved toward chip multiprocessor (CMP) designs as a means of utilizing the increasing transistor counts in the face of physical and micro...