We present a new multiple ring network for multiprocessors, called the Multistage Ring Network(MRN). The MRN has a 2-level hierarchy of register insertion rings, and its interconn...
In this paper we describe a design exploration methodology for clustered VLIW architectures. The central idea of this work is a set of three techniques aimed at reducing the cost ...
Marcio Buss, Rodolfo Azevedo, Paulo Centoducatte, ...
In a recent work, we have shown that it is not possible to dependably build any type of distributed f fault or intrusiontolerant system under the asynchronous model. This result f...
Paulo Sousa, Nuno Ferreira Neves, Paulo Verí...
This paper presents a on-chip stack based memory organization that effectively reduces the energy dissipation in programmable embedded system architectures. Most embedded systems ...
This paper analyses the requirements of a third-generation technology integrated learning environment. The architecture proposed is analysed in terms of the generic constraints of...