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IEEEPACT
2005
IEEE
14 years 1 months ago
Communication Optimizations for Fine-Grained UPC Applications
Global address space languages like UPC exhibit high performance and portability on a broad class of shared and distributed memory parallel architectures. The most scalable applic...
Wei-Yu Chen, Costin Iancu, Katherine A. Yelick
CASES
2007
ACM
13 years 11 months ago
Performance evaluation and optimization of dual-port SDRAM architecture for mobile embedded systems
Recently dual-port SDRAM (DPSDRAM) architecture tailored for dual-processor based mobile embedded systems has been announced where a single memory chip plays the role of the local...
Hoeseok Yang, Sungchan Kim, Hae-woo Park, Jinwoo K...
IPPS
1998
IEEE
13 years 12 months ago
Optimal Communication Performance on Fast Ethernet with GAMMA
Abstract. The current prototype of the Genoa Active Message MAchine GAMMA is a low-overhead, Active Messages-based inter-process communication layer implemented mainly at kernel le...
Giuseppe Ciaccio
DATE
2003
IEEE
154views Hardware» more  DATE 2003»
14 years 1 months ago
Packetized On-Chip Interconnect Communication Analysis for MPSoC
Interconnect networks play a critical role in shared memory multiprocessor systems-on-chip (MPSoC) designs. MPSoC performance and power consumption are greatly affected by the pac...
Terry Tao Ye, Luca Benini, Giovanni De Micheli
ATAL
2006
Springer
13 years 9 months ago
ReAgents: behavior-based remote agents and their performance
We present a performance analysis of an agent-based middleware system we have developed based on "reAgents," remotely executing agents that enhance the performance of cl...
Eugene Hung, Joseph Pasquale