2822 search results - page 38 / 565 » Performance Analysis of Systems with Multi-Channel Communica... |
DAC
2003
ACM
14 years 10 months ago
2003
ACM
In the Artemis project [13], design space exploration of embedded systems is provided by modeling application behavior and architectural performance constraints separately. Mappin...
DATE
2003
IEEE
2003
IEEE
Exploiting the Routing Flexibility for Energy/Performance Aware Mapping of Regular NoC Architectures
14 years 2 months ago
In this paper, we present an algorithm which automatically maps the IPs onto a generic regular Network on Chip (NoC) architecture and constructs a deadlock-free deterministic rout...
IPPS
2002
IEEE
14 years 1 months ago
2002
IEEE
This paper introduces semi-user-level communication architecture, a new high-performance light-weighted communication architecture for inter-node communication of clusters. Differ...
IPPS
2007
IEEE
14 years 3 months ago
2007
IEEE
The IBM Cyclops-64 (C64) chip employs a multithreaded architecture that integrates a large number of hardware thread units on a single chip. A cellular supercomputer is being deve...
WAN
1998
Springer
14 years 17 days ago
1998
Springer
We present a model for the parallel performance of algorithms that consist of concurrent, two-dimensional wavefronts implemented in a message passing environment. The model combine...