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» Performance Engineering Case Study: Heap Construction
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CODES
2006
IEEE
13 years 11 months ago
Phase guided sampling for efficient parallel application simulation
Simulating chip-multiprocessor systems (CMP) can take a long time. For single-threaded workloads, earlier work has shown the utility of phase analysis, that is identification of r...
Jeffrey Namkung, Dohyung Kim, Rajesh K. Gupta, Igo...
EGH
2009
Springer
13 years 5 months ago
Object partitioning considered harmful: space subdivision for BVHs
A major factor for the efficiency of ray tracing is the use of good acceleration structures. Recently, bounding volume hierarchies (BVHs) have become the preferred acceleration st...
Stefan Popov, Iliyan Georgiev, Rossen Dimov, Phili...
QEST
2010
IEEE
13 years 5 months ago
Automatic Compositional Reasoning for Probabilistic Model Checking of Hardware Designs
Adaptive techniques like voltage and frequency scaling, process variations and the randomness of input data contribute signi cantly to the statistical aspect of contemporary hardwa...
Jayanand Asok Kumar, Shobha Vasudevan
DAC
2002
ACM
14 years 8 months ago
Exploiting operation level parallelism through dynamically reconfigurable datapaths
Increasing non-recurring engineering (NRE) and mask costs are making it harder to turn to hardwired Application Specific Integrated Circuit (ASIC) solutions for high performance a...
Zhining Huang, Sharad Malik
INFOCOM
2005
IEEE
14 years 1 months ago
On the interaction between overlay routing and underlay routing
— In this paper, we study the interaction between overlay routing and Traffic Engineering (TE) in a single Autonomous System (AS). We formulate this interaction as a twoplayer n...
Yong Liu, Honggang Zhang, Weibo Gong, Donald F. To...