472 search results - page 35 / 95 » Performance Evaluation of Memory Caches in Multiprocessors |
IEEEPACT
2005
IEEE
14 years 1 months ago
2005
IEEE
Transactional Coherence and Consistency (TCC) is a novel coherence scheme for shared memory multiprocessors that uses programmer-defined transactions as the fundamental unit of p...
ASPLOS
1992
ACM
13 years 11 months ago
1992
ACM
Next generation computer systems will have gigabytes of physical memory and processors in the 200 MIPS range or higher. While this trend suggests that memory management for most p...
HPCA
2008
IEEE
14 years 8 months ago
2008
IEEE
Multiprocessor computer systems are currently widely used in commercial settings to run critical applications. These applications often operate on sensitive data such as customer ...
HPCA
2009
IEEE
14 years 8 months ago
2009
IEEE
In a Chip Multi-Processor (CMP) with private caches, the last level cache is statically partitioned between all the cores. This prevents such CMPs from sharing cache capacity in r...
IEEEPACT
2008
IEEE
14 years 2 months ago
2008
IEEE
This paper presents the Distributed Cooperative Caching, a scalable and energy-efficient scheme to manage chip multiprocessor (CMP) cache resources. The proposed configuration is...