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» Performance Evaluation of Memory Caches in Multiprocessors
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HPCA
2012
IEEE
12 years 4 months ago
Decoupled dynamic cache segmentation
The least recently used (LRU) replacement policy performs poorly in the last-level cache (LLC) because temporal locality of memory accesses is filtered by first and second level...
Samira Manabi Khan, Zhe Wang, Daniel A. Jimé...
ICS
1998
Tsinghua U.
14 years 1 months ago
OPTNET: A Cost-effective Optical Network for Multiprocessors
In this paper we propose the OPTNET, a novel optical network and associated coherence protocol for scalable multiprocessors. The network divides its channels into broadcast and po...
Enrique V. Carrera, Ricardo Bianchini
ASPLOS
2011
ACM
13 years 12 days ago
RCDC: a relaxed consistency deterministic computer
Providing deterministic execution significantly simplifies the debugging, testing, replication, and deployment of multithreaded programs. Recent work has developed deterministic...
Joseph Devietti, Jacob Nelson, Tom Bergan, Luis Ce...
ISCA
1993
IEEE
153views Hardware» more  ISCA 1993»
14 years 28 days ago
An Adaptive Cache Coherence Protocol Optimized for Migratory Sharing
Parallel programs that use critical sections and are executed on a shared-memory multiprocessor with a writeinvalidate protocol result in invalidation actions that could be elimin...
Per Stenström, Mats Brorsson, Lars Sandberg
EURODAC
1994
IEEE
129views VHDL» more  EURODAC 1994»
14 years 28 days ago
A portable and extendible testbed for distributed logic simulation
A exible test environment is presented that allows for dierent methods of parallelizing discrete event simulation to be evaluated in a uniform environment. The testbed is portabl...
Peter Luksch