Sciweavers

112 search results - page 21 / 23
» Performance Implications of Cache Affinity on Multicore Proc...
Sort
View
DAMON
2006
Springer
13 years 9 months ago
B-tree indexes, interpolation search, and skew
Recent performance improvements in storage hardware have benefited bandwidth much more than latency. Among other implications, this trend favors large B-tree pages. Recent perform...
Goetz Graefe
JPDC
2010
106views more  JPDC 2010»
13 years 5 months ago
Feedback-directed page placement for ccNUMA via hardware-generated memory traces
Non-uniform memory architectures with cache coherence (ccNUMA) are becoming increasingly common, not just for large-scale high performance platforms but also in the context of mul...
Jaydeep Marathe, Vivek Thakkar, Frank Mueller
HPCA
2008
IEEE
14 years 7 months ago
FlexiTaint: A programmable accelerator for dynamic taint propagation
This paper presents FlexiTaint, a hardware accelerator for dynamic taint propagation. FlexiTaint is implemented as an in-order addition to the back-end of the processor pipeline, ...
Guru Venkataramani, Ioannis Doudalis, Yan Solihin,...
ISCA
2008
IEEE
113views Hardware» more  ISCA 2008»
14 years 1 months ago
A Two-Level Load/Store Queue Based on Execution Locality
Multicore processors have emerged as a powerful platform on which to efficiently exploit thread-level parallelism (TLP). However, due to Amdahl’s Law, such designs will be incr...
Miquel Pericàs, Adrián Cristal, Fran...
ICNP
2009
IEEE
14 years 2 months ago
Scalable IP Lookups using Shape Graphs
—Recently, there has been much renewed interest in developing compact data structures for packet processing functions such as longest prefix-match for IP lookups. This has been ...
Haoyu Song, Murali S. Kodialam, Fang Hao, T. V. La...