112 search results - page 6 / 23 » Performance Implications of Cache Affinity on Multicore Proc... |
ICPP
2009
IEEE
14 years 3 months ago
2009
IEEE
The multicore revolution is underway, bringing new chips introducing more complex memory architectures. Classical algorithms must be revisited in order to take the hierarchical me...
PPOPP
2009
ACM
14 years 9 months ago
2009
ACM
Recent advances in polyhedral compilation technology have made it feasible to automatically transform affine sequential loop nests for tiled parallel execution on multi-core proce...
DAC
2007
ACM
14 years 9 months ago
2007
ACM
Multicore has shown significant performance and power advantages over single cores in commercial systems with a 2-4 cores. Applying a corollary of Moore's Law for multicore, ...
ISCA
2009
IEEE
14 years 3 months ago
2009
IEEE
While microprocessor designers turn to multicore architectures to sustain performance expectations, the dramatic increase in parallelism of such architectures will put substantial...
IEEEPACT
2009
IEEE
2009
IEEE
Soft-OLP: Improving Hardware Cache Performance through Software-Controlled Object-Level Partitioning
14 years 3 months ago
—Performance degradation of memory-intensive programs caused by the LRU policy’s inability to handle weaklocality data accesses in the last level cache is increasingly serious ...