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IWMM
2011
Springer
270views Hardware» more  IWMM 2011»
12 years 10 months ago
Memory management in NUMA multicore systems: trapped between cache contention and interconnect overhead
Multiprocessors based on processors with multiple cores usually include a non-uniform memory architecture (NUMA); even current 2-processor systems with 8 cores exhibit non-uniform...
Zoltan Majo, Thomas R. Gross
HPCA
2009
IEEE
14 years 8 months ago
Design and implementation of software-managed caches for multicores with local memory
Heterogeneous multicores, such as Cell BE processors and GPGPUs, typically do not have caches for their accelerator cores because coherence traffic, cache misses, and latencies fr...
Sangmin Seo, Jaejin Lee, Zehra Sura
EUC
2006
Springer
13 years 11 months ago
Dynamic Repartitioning of Real-Time Schedule on a Multicore Processor for Energy Efficiency
Multicore processors promise higher throughput at lower power consumption than single core processors. Thus in the near future they will be widely used in hard real-time systems as...
Euiseong Seo, Yongbon Koo, Joonwon Lee
IPPS
2010
IEEE
13 years 5 months ago
Servet: A benchmark suite for autotuning on multicore clusters
Abstract--The growing complexity in computer system hierarchies due to the increase in the number of cores per processor, levels of cache (some of them shared) and the number of pr...
Jorge González-Domínguez, Guillermo ...
HPCA
2008
IEEE
14 years 7 months ago
Gaining insights into multicore cache partitioning: Bridging the gap between simulation and real systems
Cache partitioning and sharing is critical to the effective utilization of multicore processors. However, almost all existing studies have been evaluated by simulation that often ...
Jiang Lin, Qingda Lu, Xiaoning Ding, Zhao Zhang, X...