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ISHPC
2003
Springer
14 years 22 days ago
Code and Data Transformations for Improving Shared Cache Performance on SMT Processors
Simultaneous multithreaded processors use shared on-chip caches, which yield better cost-performance ratios. Sharing a cache between simultaneously executing threads causes excessi...
Dimitrios S. Nikolopoulos
IPPS
1997
IEEE
13 years 11 months ago
Performance Comparison of Processor Scheduling Strategies in a Distributed-Memory Multicomputer System
Abstract — Processor scheduling has received considerable attention in the context of shared-memory multiprocessor systems but has not received as much attention in distributed-m...
Yuet-Ning Chan, Sivarama P. Dandamudi, Shikharesh ...
EUROPAR
2000
Springer
13 years 11 months ago
A Statistical-Empirical Hybrid Approach to Hierarchical Memory Analysis
A hybrid approach that utilizes both statistical techniques and empirical methods seeks to provide more information about the performance of an application. In this paper, we prese...
Xian-He Sun, Kirk W. Cameron
FPL
2005
Springer
226views Hardware» more  FPL 2005»
14 years 1 months ago
A Parallel MPEG-4 Encoder for FPGA Based Multiprocessor SoC
A parallel MPEG-4 Simple Profile encoder for FPGA based multiprocessor System-on-Chip (SOC) is presented. The goal is a computationally scalable framework independent of platform....
Olli Lehtoranta, Erno Salminen, Ari Kulmala, Marko...
SPAA
2005
ACM
14 years 1 months ago
Efficient algorithms for verifying memory consistency
One approach in verifying the correctness of a multiprocessor system is to show that its execution results comply with the memory consistency model it is meant to implement. It ha...
Chaiyasit Manovit, Sudheendra Hangal