439 search results - page 42 / 88 » Performance Modeling of MANET Interconnectivity |
128
Voted
EUROPAR
1997
Springer
15 years 7 months ago
1997
Springer
The large latency of memory accesses is a major obstacle in obtaining high processor utilization in large scale shared-memory multiprocessors. Access to remote memory is likely to ...
142
Voted
TCAD
2010
14 years 10 months ago
2010
The structural redundancy inherent to on-chip interconnection networks [networks on chip (NoC)] can be exploited by adaptive routing algorithms in order to provide connectivity eve...
93
Voted
DATE
2002
IEEE
15 years 8 months ago
2002
IEEE
The relative tolerances for interconnect and device parameter variations have not scaled with feature sizes which have brought about significant performance variability. As we sca...
132
Voted
ESAS
2006
Springer
15 years 7 months ago
2006
Springer
We investigate the performance of of several protocol enhancements to the On-Demand Secure Byzantine Routing (ODSBR) [3] protocol in the presence of various Byzantine Attack models...
63
Voted
COLING
1990
15 years 4 months ago
1990
We will attempt to show how human performance limitations on various types of syntactic embedding constructions in Germanic languages can be modelled in a relational network lingu...